Unless otherwise indicated herein, the materials described in this section are not prior art to the claims in this application and are not admitted to be prior art by inclusion in this section.
In multi-core processor architectures, multiple processor cores may be included in a single integrated circuit die or on multiple integrated circuit dies that are arranged in a single package. A cache may be used to locally store data for access by one or more of the processor cores. The data can be a subset of data stored in a larger memory that is typically located outside of the die.
A single piece of data may be stored in multiple caches, and a cache coherence protocol may be used to keep track of data stored in the multiple caches. The cache coherence protocol is configured to ensure that multiple requests for the data consistently result in the same data being returned. The cache coherence protocol may be directory based, where data stored in cache is indexed in a directory. The directory may be used as a filter and process requests to retrieve data stored in multiple caches. When an entry in the directory is changed, indicating a change in corresponding data stored in a cache, the directory updates or invalidates the status of other caches indexed with that entry. In this way, caches with an old version of the data are no longer indexed as valid sources of the data in the directory.
                all arranged according to at least some embodiments presented herein.        